As the technological advancement in the display panel industry becomes more demanding on display quality, it also moves towards reducing the size of panels. It is also desirable that the manufacturing cost can be as low as possible while achieving the same functionality in the product. Technology constantly evolves to meet these needs. To generate gate pulse signals and data pulse signals, the industry typically employs external driver integrated circuits, which are an extra step in the production process and a waste of resources. An engineering bypass would be incorporating, during manufacture, the shift register of the gate driver integrated circuit straight onto the glass panel, a technique often known as gate-driver-on-array (GOA).
Displays tend to become more versatile. Not only do manufacturers pursue higher scan rates, they also wish that two-dimension (2D) and three-dimension (3D) modes are inter-operable on the same panel. The circuitry has to be modified accordingly. For instance, a common display may only scan at a rate of 60 Hz, serviceable only in 2D mode, as shown in FIG. 1, where the next adjacent scan line is driven. The same conventional display circuit, which drives the next adjacent scan line, would not be applicable in 3D mode because the first-stage output and the second-stage output are of the same phase (see FIG. 2).
To employ such circuitry in 3D mode, three high-frequency signal widths of drift time might exist for a 60-Hz operating frequency, inviting electrical leakage or other signal interference. In other words, the driver circuit drives the next adjacent scan line once every period when the display operates in 2D mode, but in 3D mode the driver circuit has to idle for three periods to drive the fourth next scan line, rendering the output signal floating, unstable, and vulnerable to interference in a 60-Hz frame rate.